Unified Video Decoder (UVD, previously called Universal Video Decoder) is the name given to AMD's dedicated video decoding ASIC. There are multiple versions implementing a multitude of video codecs, such as H.264 and VC-1.

UVD was introduced with the Radeon HD 2000 Series and is integrated into some of AMD's GPUs and APUs. UVD occupies a considerable amount of the die surface at the time of its introduction[1] and is not to be confused with AMD's Video Coding Engine (VCE).

As of AMD Raven Ridge (released January 2018), UVD and VCE were succeeded by Video Core Next (VCN).

Overview

The UVD is based on an ATI Xilleon video processor, which is incorporated onto the same die as the GPU and is part of the ATI Avivo HD for hardware video decoding, along with the Advanced Video Processor (AVP). UVD, as stated by AMD, handles decoding of H.264/AVC, and VC-1 video codecs entirely in hardware.

The UVD technology is based on the Cadence Tensilica Xtensa[2] processor,[3][4][5] which was originally licensed by ATI Technologies Inc. in 2004.[6]

UVD/UVD+

In early versions of UVD, video post-processing is passed to the pixel shaders and OpenCL kernels. MPEG-2 decoding is not performed within UVD, but in the shader processors. The decoder meets the performance and profile requirements of Blu-ray and HD DVD, decoding H.264 bitstreams up to a bitrate of 40 Mbit/s. It has context-adaptive binary arithmetic coding (CABAC) support for H.264/AVC.

Unlike video acceleration blocks in previous generation GPUs, which demanded considerable host-CPU involvement, UVD offloads the entire video-decoder process for VC-1 and H.264 except for video post-processing, which is offloaded to the shaders. MPEG-2 decode is also supported, but the bitstream/entropy decode is not performed for MPEG-2 video in hardware.

Previously, neither ATI Radeon R520 series' ATI Avivo nor NVidia Geforce 7 series' PureVideo assisted front-end bitstream/entropy decompression in VC-1 and H.264 - the host CPU performed this work.[7] UVD handles VLC/CAVLC/CABAC, frequency transform, pixel prediction and inloop deblocking, but passes the post processing to the shaders.[8] Post-processing includes denoising, de-interlacing, and scaling/resizing. AMD has also stated that the UVD component being incorporated into the GPU core only occupies 4.7 mm² in area on 65 nm fabrication process node.

A variation on UVD, called UVD+, was introduced with the Radeon HD 3000 series. UVD+ support HDCP for higher resolution video streams.[9] But UVD+ was also being marketed as simply UVD.

UVD 2

The UVD saw a refresh with the release of the Radeon HD 4000 series products. The UVD 2 features full bitstream decoding of H.264/MPEG-4 AVC, VC-1, as well as iDCT level acceleration of MPEG2 video streams. Performance improvements allow dual video stream decoding and Picture-in-Picture mode. This makes UVD2 full BD-Live compliant.

The UVD 2.2 features a re-designed local memory interface and enhances the compatibility with MPEG2/H.264/VC-1 videos. However, it was marketed under the same alias as "UVD 2 Enhanced" as the "special core-logic, available in RV770 and RV730 series of GPUs, for hardware decoding of MPEG2, H.264 and VC-1 video with dual-stream decoding". The nature of UVD 2.2 being an incremental update to the UVD 2 can be accounted for this move.

UVD 3

UVD 3 adds support for additional hardware MPEG2 decoding (entropy decode), DivX and Xvid via MPEG-4 Part 2 decoding (entropy decode, inverse transform, motion compensation) and Blu-ray 3D via MVC (entropy decode, inverse transform, motion compensation, in-loop deblocking).[10][11] along with 120 Hz stereo 3D support,[12] and is optimized to utilize less CPU processing power. UVD 3 also adds support for Blu-ray 3D stereoscopic displays.

UVD 4

UVD 4 includes improved frame interpolation with H.264 decoder.[13] UVD 4.2 was introduced with the AMD Radeon Rx 200 series and Kaveri APU."X.ORG Radeon UVD (Unified Video Decoder) Hardware-UVD4.2: KAVERI, KABINI, MULLINS, BONAIRE, HAWAII". May 2016.

UVD 5

UVD 5 was introduced with the AMD Radeon R9 285. New to UVD is full support for 4K H.264 video, up to level 5.2 (4Kp60).[14]

UVD 6

The UVD 6.0 decoder and Video Coding Engine 3.1 encoder were reported to be first used in GPUs based on GCN 3, including Radeon R9 Fury series and "Carrizo"-APUs,[15][16] followed by AMD Radeon Rx 300 Series (Pirate Islands GPU family) and AMD Radeon Rx 400 Series (Arctic Islands GPU family).[17] The UVD version in "Fiji" and "Carrizo"-based graphics controller hardware is also announced to provide support for High Efficiency Video Coding (HEVC, H.265) hardware video decoding, up to 4K, 8-bits color (H.265 version 1, main profile);[18][19][20] and there is support for the 10bit-color HDR both H.265 and VP9 video codec in the AMD Radeon 400 series with UVD 6.3.[21][22][23]

UVD 7

The UVD 7.0 decoder and Video Coding Engine 4.0 encoder are included in the Vega-based GPUs.[24][25] But there is still no fixed function VP9 hardware decoding.[26]

UVD 7.2

AMD's Vega20 GPU, present in the Instinct Mi50, Instinct Mi60 and Radeon VII cards, include VCE 4.1 and two UVD 7.2 instances.[27][28]

VCN 1

Starting with the integrated graphics of the Raven Ridge APU (Ryzen 2200/2400G), the former UVD and VCE have been replaced by the new "Video Core Next" (VCN). VCN 1.0 adds full hardware decoding for the VP9 codec.[29]

Format support

[30][29]

Unified Video Decoder and Video Core Next decoding/encoding support[30][29]
Implementation MPEG-1[lower-alpha 1] H.262
(MPEG-2)		 H.263
(MPEG-4 ASP)		 VC-1/WMV 9 H.264
(MPEG-4 AVC)[lower-alpha 2]		 H.265
(HEVC)		 VP9 AV1 JPEG Maximum resolution Color depth AMD Fluid Motion
Decoding Decoding Decoding Decoding Decoding Encoding Decoding Encoding Decoding Decoding Encoding Decoding Frame interpolation
UVD 1.0 RV610, RV630, RV670, RV620, RV635 No No No Yes Yes No No No No No No No 2K 8-bit No
UVD 2.0 RS780, RS880, RV770
UVD 2.2 RV710, RV730, RV740
UVD 2.3 Cedar, Redwood, Juniper, Cypress
UVD 3.0 Palm (Wrestler/Ontario), Sumo (Llano), Sumo2 (Llano) Yes Yes Yes
UVD 3.1 Barts, Turks, Caicos, Cayman, Seymour
UVD 3.2 Aruba (Trinity/Richland), Tahiti VCE[upper-alpha 1]
UVD 4.0 Cape Verde, Pitcairn Yes
UVD 4.2 Kaveri, Kabini, Mullins, Bonaire, Hawaii
UVD 5.0 Tonga 4K
UVD 6.0 Carrizo, Fiji Yes Yes
UVD 6.2 Stoney 10-bit
UVD 6.3 Polaris, VegaM, Lexa VCE[upper-alpha 1]
UVD 7.0 Vega10, Vega12
UVD 7.2 Vega20
VCN 1.0 Raven, Picasso Yes Yes Yes
VCN 2.0 Navi10, Navi12, Navi14, Renoir, Cezanne 8K No
VCN 2.5 Arcturus
VCN 2.6 Aldebaran
VCN 3.0 Navi21, Navi22, Navi23, Navi24 Yes
VCN 3.1.0 Van Gogh ? ? ?
VCN 3.1.1 Rembrandt No No No No 8K 10-bit No
VCN 3.1.2 Raphael ? ? ?
VCN 4.0 Navi 3x Yes ? ? ?
Implementation Decoding Decoding Decoding Decoding Decoding Encoding Decoding Encoding Decoding Decoding Encoding Decoding Maximum resolution Color depth Frame interpolation
MPEG-1[lower-alpha 1] H.262
(MPEG-2)		 H.263
(MPEG-4 ASP)		 VC-1/WMV 9 H.264
(MPEG-4 AVC)		 H.265
(HEVC)		 VP9 AV1 JPEG AMD Fluid Motion
  1. 1 2 All MPEG-2 decoders support MPEG-1 CPB
  2. ↑ High 10 Profile encoding/decoding isn't supported
  1. 1 2 MPEG-4 AVC and HEVC encoding by separate Video Coding Engine

Availability

Most of the Radeon HD 2000 series video cards implement the UVD for hardware decoding of 1080p high definition contents.[31] However, the Radeon HD 2900 series video cards do not include the UVD (though it is able to provide partial functionality through the use of its shaders), which was incorrectly stated to be present on the product pages and package boxes of the add-in partners' products before the launch of the Radeon HD 2900 XT, either stating the card as featuring ATI Avivo HD or explicitly UVD, which only the former statement of ATI Avivo HD is correct. The exclusion of UVD was also confirmed by AMD officials.[32]

UVD2 is implemented in the Radeon RV7x0 and R7x0 series GPUs. This also includes the RS7x0 series used for the AMD 700 chipset series IGP motherboards.

Feature overview

APUs

The following table shows features of AMD's processors with 3D graphics, including APUs (see also: List of AMD processors with 3D graphics).

Platform High, standard and low power Low and ultra-low power
CodenameServer Basic Toronto
Micro Kyoto
Desktop Performance Raphael Phoenix
Mainstream Llano Trinity Richland Kaveri Kaveri Refresh (Godavari) Carrizo Bristol Ridge Raven Ridge Picasso Renoir Cezanne
Entry
Basic Kabini Dalí
MobilePerformance Renoir Cezanne Rembrandt Dragon Range
Mainstream Llano Trinity Richland Kaveri Carrizo Bristol Ridge Raven Ridge Picasso Renoir
Lucienne		 Cezanne
Barceló		 Phoenix
Entry Dalí Mendocino
Basic Desna, Ontario, Zacate Kabini, Temash Beema, Mullins Carrizo-L Stoney Ridge Pollock
Embedded Trinity Bald Eagle Merlin Falcon,
Brown Falcon		 Great Horned Owl Grey Hawk Ontario, Zacate Kabini Steppe Eagle, Crowned Eagle,
LX-Family		 Prairie Falcon Banded Kestrel River Hawk
ReleasedAug 2011Oct 2012Jun 2013Jan 2014 2015Jun 2015Jun 2016Oct 2017Jan 2019Mar 2020 Jan 2021Jan 2022Sep 2022Jan 2023Jan 2011May 2013Apr 2014May 2015Feb 2016Apr 2019Jul 2020Jun 2022Nov 2022
CPU microarchitecture K10 Piledriver Steamroller Excavator "Excavator+"[33] Zen Zen+ Zen 2 Zen 3 Zen 3+ Zen 4 Bobcat Jaguar Puma Puma+[34] "Excavator+" Zen Zen+ "Zen 2+"
ISAx86-64 v1x86-64 v2x86-64 v3x86-64 v4x86-64 v1x86-64 v2x86-64 v3
Socket Desktop Performance — AM5 — —
Mainstream — AM4 — —
Entry FM1 FM2 FM2+ FM2+[lower-alpha 1], AM4 AM4 —
Basic — — AM1 — FP5 —
Other FS1 FS1+, FP2 FP3 FP4 FP5 FP6 FP7 FL1 FP7
FP7r2
FP8		 ? FT1 FT3 FT3b FP4 FP5 FT5 FP5 FT6
PCI Express version 2.0 3.0 4.0 5.0 4.0 2.0 3.0
CXL— —
Fab. (nm) GF 32SHP
(HKMG SOI)		 GF 28SHP
(HKMG bulk)		 GF 14LPP
(FinFET bulk)		 GF 12LP
(FinFET bulk)		 TSMC N7
(FinFET bulk)		 TSMC N6
(FinFET bulk)		 CCD: TSMC N5
(FinFET bulk)
cIOD: TSMC N6
(FinFET bulk)		 TSMC 4nm
(FinFET bulk)		 TSMC N40
(bulk)		 TSMC N28
(HKMG bulk)		 GF 28SHP
(HKMG bulk)		 GF 14LPP
(FinFET bulk)		 GF 12LP
(FinFET bulk)		 TSMC N6
(FinFET bulk)
Die area (mm2)228246245245250210[35]156 180210CCD: (2x) 70
cIOD: 122		 17875 (+ 28 FCH)107?125149~100
Min TDP (W)3517121015105354.543.95106128
Max APU TDP (W)10095654517054182565415
Max stock APU base clock (GHz)33.84.14.13.73.83.63.73.84.03.34.74.31.752.222.23.22.61.23.352.8
Max APUs per node[lower-alpha 2]11
Max core dies per CPU1211
Max CCX per core die1211
Max cores per CCX482424
Max CPU[lower-alpha 3] cores per APU481682424
Max threads per CPU core1212
Integer pipeline structure3+32+24+24+2+11+3+3+1+21+1+1+12+24+24+2+1
i386, i486, i586, CMOV, NOPL, i686, PAE, NX bit, CMPXCHG16B, AMD-V, RVI, ABM, and 64-bit LAHF/SAHFYes Yes
IOMMU[lower-alpha 4]—v2v1v2
BMI1, AES-NI, CLMUL, and F16C Yes—Yes
MOVBE—Yes
AVIC, BMI2, RDRAND, and MWAITX/MONITORX —Yes
SME[lower-alpha 5], TSME[lower-alpha 5], ADX, SHA, RDSEED, SMAP, SMEP, XSAVEC, XSAVES, XRSTORS, CLFLUSHOPT, CLZERO, and PTE Coalescing—Yes —Yes
GMET, WBNOINVD, CLWB, QOS, PQE-BW, RDPID, RDPRU, and MCOMMIT—Yes —Yes
MPK, VAES—Yes —
SGX——
FPUs per core10.5110.51
Pipes per FPU22
FPU pipe width128-bit256-bit80-bit128-bit256-bit
CPU instruction set SIMD levelSSE4a[lower-alpha 6]AVX AVX2AVX-512SSSE3AVXAVX2
3DNow!3DNow!+— —
PREFETCH/PREFETCHWYes Yes
GFNI—Yes —
AMX—
FMA4, LWP, TBM, and XOP—Yes— —Yes—
FMA3Yes Yes
AMD XDNA—Yes —
L1 data cache per core (KiB)64163232
L1 data cache associativity (ways)2488
L1 instruction caches per core10.51 10.51
Max APU total L1 instruction cache (KiB)256128192256512256 64128 96 128
L1 instruction cache associativity (ways)2348 2 3 4 8
L2 caches per core10.5110.51
Max APU total L2 cache (MiB)424161212
L2 cache associativity (ways)168168
Max on--die L3 cache per CCX (MiB)—41632—4
Max 3D V-Cache per CCD (MiB)—64——
Max total in-CCD L3 cache per APU (MiB)4816644
Max. total 3D V-Cache per APU (MiB)—64——
Max. board L3 cache per APU (MiB)——
Max total L3 cache per APU (MiB)48161284
APU L3 cache associativity (ways)1616
L3 cache schemeVictimVictim
Max. L4 cache——
Max stock DRAM supportDDR3-1866DDR3-2133DDR3-2133, DDR4-2400DDR4-2400DDR4-2933DDR4-3200, LPDDR4-4266DDR5-4800, LPDDR5-6400DDR5-5200DDR5-5600, LPDDR5x-7500DDR3L-1333DDR3L-1600DDR3L-1866DDR3-1866, DDR4-2400DDR4-2400DDR4-1600DDR4-3200LPDDR5-5500
Max DRAM channels per APU21212
Max stock DRAM bandwidth (GB/s) per APU29.86634.13238.40046.93268.256102.40083.200120.000 10.66612.80014.93319.20038.40012.80051.20088.000
GPU microarchitectureTeraScale 2 (VLIW5)TeraScale 3 (VLIW4)GCN 2nd genGCN 3rd genGCN 5th gen[36]RDNA 2RDNA 3TeraScale 2 (VLIW5)GCN 2nd genGCN 3rd gen[36]GCN 5th genRDNA 2
GPU instruction setTeraScale instruction setGCN instruction setRDNA instruction setTeraScale instruction setGCN instruction setRDNA instruction set
Max stock GPU base clock (MHz)60080084486611081250140021002400400 538600?847900120060013001900
Max stock GPU base GFLOPS[lower-alpha 7]480614.4648.1886.71134.517601971.22150.43686.4102.4 86???345.6460.8230.41331.2486.4
3D engine[lower-alpha 8]Up to 400:20:8Up to 384:24:6Up to 512:32:8Up to 704:44:16[37]Up to 512:32:8768:48:8128:8:480:8:4128:8:4Up to 192:12:8Up to 192:12:4192:12:4Up to 512:?:?128:?:?
IOMMUv1IOMMUv2IOMMUv1?IOMMUv2
Video decoderUVD 3.0UVD 4.2UVD 6.0VCN 1.0[38]VCN 2.1[39] VCN 2.2[39]VCN 3.1?UVD 3.0UVD 4.0UVD 4.2UVD 6.0UVD 6.3VCN 1.0VCN 3.1
Video encoder—VCE 1.0VCE 2.0VCE 3.1—VCE 2.0VCE 3.1
AMD Fluid Motion No Yes No No Yes No
GPU power savingPowerPlayPowerTunePowerPlayPowerTune[40]
TrueAudio—Yes[41]? —Yes
FreeSync1
2		 1
2
HDCP[lower-alpha 9]?1.42.22.3?1.42.22.3
PlayReady[lower-alpha 9]—3.0 not yet—3.0 not yet
Supported displays[lower-alpha 10]2–32–433 (desktop)
4 (mobile, embedded)		42344
/drm/radeon[lower-alpha 11][43][44]Yes— Yes—
/drm/amdgpu[lower-alpha 11][45]—Yes[46] —Yes[46]
  1. ↑ For FM2+ Excavator models: A8-7680, A6-7480 & Athlon X4 845.
  2. ↑ A PC would be one node.
  3. ↑ An APU combines a CPU and a GPU. Both have cores.
  4. ↑ Requires firmware support.
  5. 1 2 Requires firmware support.
  6. ↑ No SSE4. No SSSE3.
  7. ↑ Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
  8. ↑ Unified shaders : texture mapping units : render output units
  9. 1 2 To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.
  10. ↑ To feed more than two displays, the additional panels must have native DisplayPort support.[42] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed.
  11. 1 2 DRM (Direct Rendering Manager) is a component of the Linux kernel. Support in this table refers to the most current version.

GPUs

The following table shows features of AMD/ATI's GPUs (see also: List of AMD graphics processing units).

Name of GPU series Wonder Mach 3D Rage Rage Pro Rage 128 R100 R200 R300 R400 R500 R600 RV670 R700 Evergreen Northern
Islands		 Southern
Islands		 Sea
Islands		 Volcanic
Islands		 Arctic
Islands/Polaris		 Vega Navi 1x Navi 2x Navi 3x
Released 1986 1991 Apr
1996		 Mar
1997		 Aug
1998		 Apr
2000		 Aug
2001		 Sep
2002		 May
2004		 Oct
2005		 May
2007		 Nov
2007		 Jun
2008		 Sep
2009		 Oct
2010		 Jan
2012		 Sep
2013		 Jun
2015		 Jun 2016, Apr 2017, Aug 2019 Jun 2017, Feb 2019 Jul
2019		 Nov
2020		 Dec
2022
Marketing Name Wonder Mach 3D
Rage		 Rage
Pro		 Rage
128		 Radeon
7000		 Radeon
8000		 Radeon
9000		 Radeon
X700/X800		 Radeon
X1000		 Radeon
HD 2000		 Radeon
HD 3000		 Radeon
HD 4000		 Radeon
HD 5000		 Radeon
HD 6000		 Radeon
HD 7000		 Radeon
200		 Radeon
300		 Radeon
400/500/600		 Radeon
RX Vega, Radeon VII		 Radeon
RX 5000		 Radeon
RX 6000		 Radeon
RX 7000
AMD support Ended Current
Kind 2D 3D
Instruction set architecture Not publicly known TeraScale instruction set GCN instruction set RDNA instruction set
Microarchitecture TeraScale 1
(VLIW)		 TeraScale 2
(VLIW5)
TeraScale 2
(VLIW5)
up to 68xx		TeraScale 3
(VLIW4)
in 69xx [47][48]
 GCN 1st
gen		 GCN 2nd
gen		 GCN 3rd
gen		 GCN 4th
gen		 GCN 5th
gen		 RDNA RDNA 2 RDNA 3
Type Fixed pipeline[lower-alpha 1] Programmable pixel & vertex pipelines Unified shader model
Direct3D — 5.0 6.0 7.0 8.1 9.0
11 (9_2)		 9.0b
11 (9_2)		 9.0c
11 (9_3)		 10.0
11 (10_0)		 10.1
11 (10_1)		 11 (11_0) 11 (11_1)
12 (11_1)		 11 (12_0)
12 (12_0)		 11 (12_1)
12 (12_1)		 11 (12_1)
12 (12_2)
Shader model — 1.4 2.0+ 2.0b 3.0 4.0 4.1 5.0 5.1 5.1
6.5		 6.7
OpenGL — 1.1 1.2 1.3 2.1[lower-alpha 2][49] 3.3 4.5 (on Linux: 4.5 (Mesa 3D 21.0))[50][51][52][lower-alpha 3] 4.6 (on Linux: 4.6 (Mesa 3D 20.0))
Vulkan — 1.0
(Win 7+ or Mesa 17+)		 1.2 (Adrenalin 20.1.2, Linux Mesa 3D 20.0)
1.3 (GCN 4 and above (with Adrenalin 22.1.2, Mesa 22.0))		 1.3
OpenCL — Close to Metal 1.1 (no Mesa 3D support) 1.2+ (on Linux: 1.1+ (no Image support on clover, with by rustiCL) with Mesa 3D, 1.2+ on GCN 1.Gen) 2.0+ (Adrenalin driver on Win7+)
(on Linux ROCM, Linux Mesa 3D 1.2+ (no Image support in clover, but in rustiCL with Mesa 3D, 2.0+ and 3.0 with AMD drivers or AMD ROCm), 5th gen: 2.2 win 10+ and Linux RocM 5.0+		 2.2+ and 3.0 windows 8.1+ and Linux ROCM 5.0+ (Mesa 3D rustiCL 1.2+ and 3.0 (2.1+ and 2.2+ wip))[53][54][55]
HSA / ROCm — Yes ?
Video decoding ASIC — Avivo/UVD UVD+ UVD 2 UVD 2.2 UVD 3 UVD 4 UVD 4.2 UVD 5.0 or 6.0 UVD 6.3 UVD 7 [24][lower-alpha 4] VCN 2.0 [24][lower-alpha 4] VCN 3.0 [56] VCN 4.0
Video encoding ASIC — VCE 1.0 VCE 2.0 VCE 3.0 or 3.1 VCE 3.4 VCE 4.0 [24][lower-alpha 4]
Fluid Motion [lower-alpha 5] No Yes No ?
Power saving ? PowerPlay PowerTune PowerTune & ZeroCore Power ?
TrueAudio — Via dedicated DSP Via shaders
FreeSync — 1
2
HDCP[lower-alpha 6] ? 1.4 2.2 2.3 [57]
PlayReady[lower-alpha 6] — 3.0 No 3.0
Supported displays[lower-alpha 7] 1–2 2 2–6 ?
Max. resolution ? 2–6 ×
2560×1600		 2–6 ×
4096×2160 @ 30 Hz		 2–6 ×
5120×2880 @ 60 Hz		 3 ×
7680×4320 @ 60 Hz [58]
7680×4320 @ 60 Hz PowerColor		 7680x4320

@165 HZ

/drm/radeon[lower-alpha 8] Yes —
/drm/amdgpu[lower-alpha 8] — Experimental [59] Optional [60] Yes
  1. ↑ The Radeon 100 Series has programmable pixel shaders, but do not fully comply with DirectX 8 or Pixel Shader 1.0. See article on R100's pixel shaders.
  2. ↑ R300, R400 and R500 based cards do not fully comply with OpenGL 2+ as the hardware does not support all types of non-power of two (NPOT) textures.
  3. ↑ OpenGL 4+ compliance requires supporting FP64 shaders and these are emulated on some TeraScale chips using 32-bit hardware.
  4. 1 2 3 The UVD and VCE were replaced by the Video Core Next (VCN) ASIC in the Raven Ridge APU implementation of Vega.
  5. ↑ Video processing for video frame rate interpolation technique. In Windows it works as a DirectShow filter in your player. In Linux, there is no support on the part of drivers and / or community.
  6. 1 2 To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.
  7. ↑ More displays may be supported with native DisplayPort connections, or splitting the maximum resolution between multiple monitors with active converters.
  8. 1 2 DRM (Direct Rendering Manager) is a component of the Linux kernel. AMDgpu is the Linux kernel module. Support in this table refers to the most current version.

Operating system support

The UVD SIP core needs to be supported by the device driver, which provides one or more interfaces such as VDPAU, VAAPI or DXVA. One of these interfaces is then used by end-user software, for example VLC media player or GStreamer, to access the UVD hardware and make use of it.

AMD Catalyst, AMD's proprietary graphics device driver that supports UVD, is available for Microsoft Windows and some Linux distributions. Additionally, a free device driver is available, which also supports the UVD hardware.

Linux

Linux support for the UVD ASIC is provided by the Linux kernel device driver amdgpu.[61]

Support for UVD has been available in AMD's proprietary driver Catalyst version 8.10 since October 2008 through X-Video Motion Compensation (XvMC) or X-Video Bitstream Acceleration (XvBA).[62][63] Since April 2013,[64] UVD is supported by the free and open-source "radeon" device driver through Video Decode and Presentation API for Unix (VDPAU). An implementation of VDPAU is available as Gallium3D state tracker in Mesa 3D.

On 28 June 2014, Phoronix published some benchmarks on using Unified Video Decoder through the VDPAU interface running MPlayer on Ubuntu 14.04 with version 10.3-testing of Mesa 3D.[65]

Windows

Microsoft Windows supported UVD since it was launched. UVD currently only supports DXVA (DirectX Video Acceleration) API specification for the Microsoft Windows and Xbox 360 platforms to allow video decoding to be hardware accelerated, thus the media player software also has to support DXVA to be able to utilize UVD hardware acceleration.

Others

Support for running custom FreeRTOS-based firmware on the Radeon HD 2400's UVD core (based on an Xtensa CPU), interfaced with a STM32 ARM-based board via I2C, was attempted as of January 2012.[66]

Predecessors and Successor

Predecessors

The Video Shader and ATI Avivo are similar technologies incorporated into previous ATI products.

Successor

The UVD was succeeded by AMD Video Core Next in the Raven Ridge series of APUs released in October 2017. The VCN combines both encode (VCE) and decode (UVD).[67]

See also

Video hardware technologies

Nvidia

AMD

Intel

Qualcomm

Others

Notes

    References

    1. ↑ "AMD A-Series APU block diagram". 2011-06-30. Retrieved 2015-01-22.
    2. ↑ "Linux operating system on Xtensa processors".
    3. ↑ Cheung, Ken (2009-01-08). "Consumer Electronics Show Features Tensilica-enabled Products". EDA Geek. Archived from the original on 2014-04-26. Retrieved 2014-05-15.
    4. ↑ "Customer Profiles | Cadence IP". Ip.cadence.com. 2014-04-13. Retrieved 2014-05-15.
    5. ↑ "Tensilica News: Excellent AMD ATI Video with Xtensa". tensilica.com. 2009-10-05. Retrieved 2014-05-15.
    6. ↑ "ATI Licenses Tensilica's Xtensa Configurable Processor" (Press release). Business Wire. 2004-10-18. Retrieved 2014-05-15.
    7. ↑ "HardSpell review" (in Chinese). Archived from the original on September 27, 2007.
    8. ↑ Smith, Ryan (February 24, 2010). "AMD's Radeon HD 5450: The Next Step In HTPC Video Cards". AnandTech. AnandTech, Inc. p. 4. Retrieved April 7, 2010. Since deinterlacing and other AVIVO post-processing actions are done by the shader hardware, the limited shading capabilities of these cards meant that AMD couldn't offer the full suite of AVIVO abilities at once.
    9. ↑ (in Chinese) PC-DVD discussion thread, retrieved August 23, 2008
    10. ↑ White Paper | AMD Unified Video Decoder (UVD)
    11. ↑ "DailyTech - Radeon 6800 Series Launches, Targets GeForce GTX 460". Archived from the original on 2012-03-20. Retrieved 2013-09-01. by Jansen Ng, 10/21/2010 DailyTech
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