Log-antilog principle

The Blackmer cell is a direct descendant of a two-transistor log-antilog circuit, itself a derivative of the simple current mirror. Normally, the bases of two transistors of a mirror are tied together to ensure the collector current I₂ of the output transistor T2 exactly mirrors the collector current I₁ of the input transistor T1. Additional positive or negative bias voltage V_Y applied between the bases of T1 and T2 converts the mirror into a current amplifier or attenuator^[14]. Scale factor or current gain follows the exponential Shockley formula:^[15]

${\displaystyle I_{2}=I_{1}e^{\frac {V_{Y}}{\phi _{t}}},}$^[16][5]

where ${\displaystyle \phi _{t}}$ it the thermal voltage, proportional to absolute temperature, and equal to 25.852 mV at 300 K.^[17]

The control voltage V_Y is usually referenced to ground, either with one terminal grounded or with both terminals driven differentially with zero volts common-mode voltage. This requires lowering emitter potential below ground, usually with an operational amplifier A1 that also converts input voltage V_X into input current I₁ (so-called transdiode configuration). A second operational amplifier A2 converts output current I₂ into output voltage V_XY.^[18][14]

In mathematics, logarithm function is defined for positive argument only. A log-antilog circuit built with NPN transistors will only accept positive input voltage V_X or only negative V_X in the case of PNP transistors.^[19][14] This is unacceptable in audio applications, which have to handle alternating current (AC) signals.^[5] Adding direct current (DC) offset to audio signals, as was proposed by Embley in 1970,^[6] will work at a fixed gain setting but any changes in gain will modulate the output DC offset.^[5]

Four-transistor Blackmer core

The complete Blackmer gain cell, regulated with a V_BE multiplier

The Blackmer circuit consists of two complementary log-antilog VCAs.^[20] Its four-transistor core – the Blackmer cell proper – combines two complementary current mirrors that are wired back-to-back and operate in a push-pull fashion.^[21] The lower NPN-type mirror (T1, T2) sinks input current I₁; the upper PNP-type mirror (T3, T4) is sourcing input current I₁ in the opposite direction.^[4] A V_BE multiplier thermally coupled to the core maintains around 1.5 V (2 V_BE) across its power supply terminals and regulates its idle current (2 mA or less in production monolithic ICs^[13]). Signal voltage is applied to terminals V_X and control voltage to terminals V_Y. Operational amplifiers A1 and A2 perform same voltage-to-current and current-to-voltage converter functions as their counterparts in a unipolar log-antilog circuit,^[20] and maintain virtual ground potential at the core's input and output nodes. Values of feedback resistors are usually set at 10 kOhm (100 kOhm in early hybrid ICs);^[22] they must be equal to ensure unity gain at zero control voltage.^[23] Potentials of all of the core's nodes other than V_y are almost independent of input signals, which is common to all current-mode circuits, which process signal currents rather than voltages.

When the control voltage V_Y=0 the core operates as a bidirectional current follower, replicating the input current I₁ to output current I₂. In cores biased to pure class A, both mirrors contribute their shares of I₂ simultaneously; in cores biased to class AB, this is only true for very small values of V_X and I₁. At higher V_X one of the mirrors of a class AB core shuts down and all output current I₂ is sunk or sourced with the other mirror, which is active. With positive (negative) V_Y current through the active mirror or both mirrors in class A increases (decreases) exponentially, exactly as it does in a single-quadrant log-antilog circuit:

${\displaystyle I_{2}=I_{1}e^{\frac {V_{Y}}{\phi _{t}}}={\frac {V_{X}}{R}}e^{\frac {V_{Y}}{\phi _{t}}},}$

${\displaystyle V_{XY}=V_{X}e^{\frac {V_{Y}}{\phi _{t}}},}$ assuming equal values of R in A1 and A2^[16]

At 300 K, the slope of the exponential control law equals 0.33 dB/mV (or 3.0 mV/dB) for either negative or positive values of V_X. In practice, the slope is inconveniently steep and the core is usually decoupled from real-world control voltages with an active attenuator. This attenuator, or any other source of V_Y, must have very low noise and very low output impedance, which is only attainable in op-amp-based circuits. A single-ended V_Y drive is almost as good as a symmetric balanced drive; having two V_Y terminals allows control of the cell by two independent single-ended voltages.^[4]

The gain of the Blackmer cell has an inverse relationship with temperature; the hotter the IC, the lower the slope of exponential control law. For example, V_Y=+70 mV at 300 K translates to a gain of 10 times or +20 dB. As the die temperature rises to 310 K, gain at V_Y=+70 mV decreases by 0.66 dB to +19.3 dB; at maximum operating temperature of 343 K (70 °C) it drops to +17.2 dB. In practice this shortcoming is easily overcome by using a control scale that is proportional to absolute temperature (PTAT). In dbx noise reduction systems and THAT Corp's analog engine, this is ensured by the physics of the Blackmer RMS detector, which is PTAT by design. In old mixing consoles, the same effect was achieved using positive temperature coefficient (PTC) thermistors.^[24]

Eight-transistor core

Basic four-transistor Blackmer core, Paul Buff eight-transistor core, and the eight-transistor core with logarithming error correction

Mismatches of PNP and NPN transistors of a basic Blackmer cell are usually balanced with trimming. Alternatively, transistors can be balanced by design via inclusion of opposite-type, diode-wired transistors into each leg of the core. Each of the four legs of the modified core contains one NPN and one PNP type transistor; although they are still functionally asymmetrical, the degree of asymmetry is greatly reduced. The slope of exponential control law is exactly half of that of the four-transistor cell. This improvement was invented by recording engineer Paul Conrad Buff and manufactured since 1980 as the monolithic ECG-101 IC by Allison Research and the identical TA-101 by Valley People.^[25][26]

Eight-transistor core with log error correction

Parasitic base and emitter resistances distort current-voltage characteristics of real-world transistors, introducing logarithming error and distorting the output signal. To improve precision beyond what was attainable through the use of oversized core transistors, Blackmer suggested using his eight-transistor core with interleaved local feedback loops. The circuit, which was first produced as hybrid dbx202C in 1978 and as monolithic 2150/2151/2155 ICs in 1981, minimizes log-error distortion when the value of each feedback resistor equals the sum of equivalent emitter resistances on NPN and PNP transistors. A simple model predicts this approach neutralizes all sources of logarthming error but in reality, feedback cannot compensate for current crowding effects, which can only be reduced by increasing transistor sizes. Cores of monolithic Blackmer ICs are so large effective feedback resistor values are less than one ohm.^[27][25]

Parallel wiring of cores

Blackmer cores, being current-in, current-out devices, can easily be connected in parallel.^[28] Wiring identical cores in parallel increases input and output currents proportionally to the number of cores, however, noise current rises only as the square root of same number. Paralleling four cores, for example, increases signal current four times and increases noise current two times, improving signal-to-noise ratio by 6 dB. The first production circuit of this type, the hybrid dbx202x, contained eight parallel cores made up of discrete transistors; the hybrid THAT2002 contained four monolithic THAT2181 dies.^[29][30]

Distortion

Distortion of a class AB Blackmer core has three main sources:

• Logarithming error due to finite parasitic resistances;
• Asymmetry of top (PNP) and bottom (NPN) transistors;
• Nonlinearity of input voltage-to-current converter (A1).^[20]

The first two sources are contained within the core and define distortion patterns at low frequencies. Both are suppressed by increasing transistor sizes, although effective neutralization of logarithming error is only possible in improved eight-transistor cores.^[31] Large transistors have lesser parasitic resistances and are less sensitive to inevitable random area mismatches.^[31] Temporal mismatches caused by thermal gradients are avoided by careful placement of core transistors and surrounding components on the IC.^[32] The residual mismatch of PNP and NPN mirrors is compensated for with trimming, usually by injecting a very small current into one of the core's two output transistors.^[33] This creates a small, asymmetric biasing voltage of a few millivolts or less, which should ideally be proportional to absolute temperature.^[33] In monolithic ICs, this is ensured by using a thermally-coupled PTAT source of bias current.^[33] Wafer-level trimming suffers from random shifts during subsequent die packaging; wafer-trimmed ICs have maximum rated THD from 0.01% (best grade) to 0.05% (worst grade) at 1V RMS input.^[34] Further reductions to 0.001% THD require in-circuit fine trimming,^[35] which is normally performed once using a precision THD analyzer and needs no further adjustments.^[30]

The output amplifier A2 operates at fixed closed-loop gain, drives a benign constant-impedance load and does not degrade distortion.^[35] The input amplifier A1 drives a nonlinear feedback loop wrapped around the core and must remain stable at any possible combination of V_X and V_Y.^[35] To avoid crossover distortion, A1 must have very high bandwidth and a fast slew rate^[9] but at treble audio frequencies, its nonlinearity becomes the dominant factor of distortion as the open-loop gain of A1 decreases.^[35] This type of distortion is common to operational amplifiers with voltage output; in production ICs, it is effectively nulled by replacing the voltage-output amplifier with a current-output transconductance amplifier.^[35][4]

Noise

Estimation and measurement of signal-to-noise ratio is difficult and ambiguous because of the complex, non-linear relationship between currents, voltages and noise. At zero or very small input signals, the core has a very low noise floor. At high input signals, this residual noise is swamped by far larger modulation noise containing products of shot noise, thermal noise from the core's transistors, and external noises that are injected into V_Y terminals.^[36] Higher input signals cause greater modulation: "noise follows the signal", in a nonlinear fashion.^[9]

At moderate gain or attenuation settings, noise of the core – assuming noise-free surrounding circuitry – is determined by collector current shot noise, which is proportional to the square root of emitter current.^[37] Thus lowest noise is attained in class AB cores with very small idle currents. Designs for lowest distortion require pure class A operation at the cost of higher noise. For example, in THAT Corp's ICs, increase of idle current from 20 μA (class AB) to 750 μA (class A) causes a rise in no-signal noise floor by 17 dB;^[38] in dbx, Inc. hybrid "cans" the difference was either 10 or 16 dB.^[6] In practice, there is no perfect compromise; the choice of low-noise class AB or low-distortion class A depends on application.^[39]

Noise of operational amplifiers A1 and A2 is only material at very low or very high gain settings. In class AB ICs by THAT Corporation, noise of A2 becomes dominant at gain of −30 dB or less, the noise of A2 becomes dominant at gains of +20 dB or more. At high output levels, the noise signature is dominated by noises injected via control terminals, even when proper care has been taken to suppress their sources.^[36]

Injection of noise and distortion via control terminals

Blackmer cells are particularly sensitive to interference at control terminals. Any signal arriving at V_Y port, either a useful control voltage or unwanted noise, directly modulates the output signal at a rate of 0.33 dB/mV for a four-transistor cell or 0.17 dB/mV for an eight-transistor cell. 1 mV of random noise or hum results in either 4% or 2% modulation, degrading signal-to-noise ratio to absolutely unacceptable values.^[40] Contamination of V_Y with input signal V_X causes not noise, but unacceptably high harmonic distortion.^[30]

Circuits driving V_Y terminals must be designed as thoroughly as professional-grade audio paths are. In practice, V_Y terminals are usually interfaced to external control signals with low-noise operational amplifiers directly, ensuring the lowest possible output impedance;^[30] low-cost amplifiers like the NE5532 are an inferior but acceptable alternative to quieter but more expensive models.^[41] Amplifiers of this class are characterized by audio frequency noise density of a few nV/${\displaystyle {\sqrt {}}}$Hz which, although low, will swamp other noise sources at high signal levels.^[42]

Control range

In class AB cores, off-state suppression of input signal, which marks the lowest end of control scale, reaches 110 dB at 1 kHz but deteriorates at higher audio frequencies due to parasitic capacitances. Single-in-line IC packages, otherwise obsolete, perform well in this respect due to the relatively long distance between input and output pins. Care should be taken to prevent capacitive coupling from V_X input to A1 non-inverting input.^[30] In class A cores, the control scale is inevitably narrower due to higher residual noise level.^[43]

Control voltage feedthrough

In class AB cores, at low frequencies, feedthrough of control voltage V_Y into the output signal has two principal sources: mismatches in core transistors that are reduced by increasing transistor sizes, and feedthrough of input bias current. Any DC component of V_X, and input offset voltage of amplifier A1 inject DC components into input current I₁, which are replicated at the output and modulated by the core along with the AC input signal. These sources of feedthrough can be neutralized with capacitive coupling, leaving one undesirable DC component, input bias current of A1. This current can be reduced to a few nanoamperes with bias-canceling input stages. At high frequencies, V_Y is coupled to the output node directly via collector-base capacitances of the core transistors. Differential V_Y drive does not eliminate the problem because of the different capacitances of PNP and NPN transistors.^[40] The residual V_Y feedthrough can be nulled by feedforward injection of inverted V_Y into the output node via a small-value capacitor, restoring capacitive symmetry of the core.^[40]

Class A cores, in general, are more prone to control voltage feedthrough owing to thermal gradients in the core (in class AB same gradients manifest themselves as distortion). Early class A ICs used as muting gates produced audible, low-frequency "thumps" but subsequent improvements in production ICs significantly reduced the undesirable feedthrough.^[43]

Bibliography