Input A B | Output A → B | |
0 | 0 | 1 |
0 | 1 | 1 |
1 | 0 | 0 |
1 | 1 | 1 |
The IMPLY gate is a digital logic gate that implements a logical conditional.
Symbols
IMPLY can be denoted in algebraic expressions with the logic symbol right-facing arrow (→). Logically, it is equivalent to material implication, and the logical expression ¬A v B.
There are two symbols for IMPLY gates: the traditional symbol and the IEEE symbol. For more information see Logic gate symbols.
Traditional IMPLY Symbol | IEEE IMPLY Symbol |
See also
Wikimedia Commons has media related to IMPLY_gates.
- NIMPLY gate
- AND gate
- NOT gate
- NAND gate
- NOR gate
- XOR gate
- XNOR gate
- Boolean algebra (logic)
- Logic gates
This article is issued from Wikipedia. The text is licensed under Creative Commons - Attribution - Sharealike. Additional terms may apply for the media files.