Michael Orshansky is an American researcher in integrated circuit design, currently with University of Texas at Austin since 2003. He received his undergraduate education and Ph.D. at the UC Berkeley.[1]

His research interests include statistical CAD algorithms for design for manufacturability, robust circuit design in the presence of process variability, low-power circuit design, modeling and characterization of semiconductor devices.

He is a recipient of the 2004 National Science Foundation Early Career Development Award (CAREER award),[2] the 2004 IEEE Transactions on Semiconductor Manufacturing Best Paper Award,[3] the Best Paper Award at the 2005 Design Automation Conference[4] and the annual SIGDA Outstanding New Faculty Award.[5]

Works

  • (With Sani Nassifand Duane Boning) (2007) "Design for Manufacturability and Statistical Design: A Constructive Approach", Springer, ISBN 0-387-30928-4

References

  1. ↑ Orshansky's home page at UTA
  2. ↑ "Engineer gets $400,000 from the National Science Foundation to improve reliability of nano-sized microchip behavior"
  3. ↑ "2004 Best Paper Awards", IEEE Trans. SM, vol. 18, no. 4, 2005. — award for “Characterization of Spatial Intrafield Gate CD Variability, Its Impact on Circuit Performance, and Spatial Mask-Level Correction,” by Michael Orshansky, Linda Milor, and Chenming Hu.
  4. ↑ Orshansky profile at the faculty directory Archived 2007-11-03 at the Wayback Machine
  5. ↑ "Assistant prof honored by SIGDA" Archived 2012-12-12 at archive.today
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