 | |
| Type | Slot |
|---|---|
| Chip form factors | Single Edge Contact Cartridge |
| Contacts | 330 |
| FSB protocol | GTL+, later AGTL+ |
| FSB frequency | 100 MT/s, 133 MT/s |
| Voltage range | 1.3 to 3.3 V |
| Processors |
|
| Predecessor | Socket 8 |
| Successor | Socket 603 |
This article is part of the CPU socket series | |
Slot 2 refers to the physical and electrical specification for the 330-lead Single Edge Contact Cartridge (or edge-connector) used by Intel's Pentium II Xeon and Pentium III Xeon.
When first introduced, Slot 1 Pentium IIs were intended to replace the Pentium and Pentium Pro processors in the home, desktop, and low-end symmetric multiprocessing (SMP) markets. The Pentium II Xeon, which was aimed at multiprocessor workstations and servers, was largely similar to the ordinary Pentium II, being based on the same P6 Deschutes core, differing by offering the choice of L2 cache capacity of 1024 or 2048 KB besides 512 KB,[1] and by operating it at the core frequency (the Pentium II used cheaper third-party SRAM chips, running at 50% of CPU speed, to reduce cost).
Because the design of the 242-lead Slot 1 connector did not support the full-speed L2 cache of the Xeon, an extended 330-lead connector was developed. This new connector, dubbed 'Slot 2', was used for Pentium II Xeon (codenamed 'Drake') and Pentium III Xeon (codenamed 'Tanner' and 'Cascades'). Slot 2 was finally replaced by the Socket 370 with the revised Pentium III codenamed Tualatin for the low power dual-processor servers, and by Socket 603 with Pentium 4-based Xeon (codenamed Foster) for workstations and quad-processor servers.
See also
References
- ↑ In the context to semiconductor memory such as cache, KB refers to 210 bytes